SS1: Quantum error correction: the quantum physics perspective
Organizers: Bane Vasić (University of Arizona), Narayanan Rengaswamy (University of Arizona)

The surface code and its topological cousins are currently the leading candidates for implementing quantum error correction in hardware, especially for technologies such as superconducting qubits. It is now well-known that these codes can be constructed from classical binary linear codes via the hypergraph product construction. However, the intuition and initial construction of the toric and surface codes came from Kitaev’s fundamentally physics perspective. Before efficient decoders were built, the connection between statistical physics and the toric code also enabled the computation of its error correction threshold. While this is only one example, albeit a famous one, of the impact of taking a physics-based perspective towards quantum error correction, it shows how such an approach can span the wide spectrum of fundamental results to practical real-world implementation. In this session, we will hear from leading experts in the field about insights on quantum error correction gained from a physicist’s point of view.

Keynote: Kenneth Brown

Bio: Kenneth Brown is the Michael Fitzpatrick Distinguished Professor of Electrical and Computer Engineering, Physics, and Chemistry at Duke University. He is the Director of the NSF Software-Tailored Architectures for Quantum codesign (STAQ) project.  He currently represents the Division of Quantum Information on the American Physical Society Council. He is on the Editorial Board of PRX Quantum and IEEE BITS and is a Scientific Advisor for IonQ. His primary research interests are quantum control, quantum error correction, and ion-trap quantum systems.

Talk Title: Quantum Error Correction and Machine Noise

Quantum error correction and fault-tolerant quantum computation promise to build reliable quantum devices from faulty components. Theoretical studies tend to focus on depolarizing and dephasing noise which can be simulated by the stochastic application of Pauli errors. In this talk, I will discuss quantum error correction in the context of a broader range of noise sources including coherent errors, leakage, and erasure. I will conclude by discussing how the co-design of hardware and fault-tolerant procedures can lead to more efficient fault-tolerant quantum computation.

SS2: Quantum error correction: the coding theory perspective
Organizers: Bane Vasić (University of Arizona), Narayanan Rengaswamy (University of Arizona)

The first demonstration of a working quantum error correcting code came from Shor’s concatenation of repetition codes in the Pauli X- and Z-bases.This led to the famous Calderbank-Shor-Steane (CSS) construction of families of quantum stabilizer codes, which is still the most common approach to building codes to this date. In fact, the recent exciting breakthrough on optimal quantum low-density parity-check (QLDPC) codes leverages this construction as well. The decoding of such codes is typically performed using efficient iterative decoding algorithms originally designed and perfected in the classical coding world. The methods to perform fault-tolerant logical gates have also benefited from classical coding ideas such as triorthogonality and codes based on monomials, e.g., Reed-Muller and polar codes. Hence, it is evident that classical coding theory has proven to be valuable in developing good quantum codes. In this session, experts will share the knowledge obtained by applying classical ideas coding to quantum error correction.

SS3: Learning for coding
Organizers: Stephan Ten Brink (University of Stuttgart), Charly Poulliat (National Polytechnic Institute of Toulouse), Camille Leroux (National Polytechnic Institute of Bordeaux)

Artificial intelligence and more specifically machine learning (ML) algorithms have been flooded all fields of scientific research. As such, digital communications and channel coding are no exception. The challenge is to devise learning algorithms in order to improve the efficiency of channel codes and decoders. This applies to the classical point-to-point communication but also in the multi-user context.

The design of codes and decoders can be seen as optimization problems for which ML is a way to converge to efficient coding systems. As in any ML problem, the difficulty is to find a consistent model and to build a relevant data base. Recent results have shown that ML can help the design of “good” codes and decoders.

Keynote: Warren Gross

Bio: Warren J. Gross (Senior Member, IEEE) received the B.A.Sc. degree in electrical engineering from the University of Waterloo, Waterloo, ON, Canada, in 1996, and the M.A.Sc. and Ph.D. degrees from the University of Toronto, Toronto, ON, Canada, in 1999 and 2003, respectively. He is currently a Professor and Louis-Ho Faculty Scholar in technological innovation and the Chair of the Department of Electrical and Computer Engineering, McGill University, Montreal, QC, Canada. His research interests are in the design and implementation of signal processing systems and custom computer architectures. He is a licensed Professional Engineer in the Province of Ontario. He served as the Chair of the IEEE Signal Processing Society Technical Committee on the Design and Implementation of Signal Processing Systems. He has served as the General Co-Chair for IEEE GlobalSIP 2017 and IEEE SiPS 2017 and the Technical Program Co-Chair of SiPS 2012. He has also served as a Organizer for the Workshop on Polar Coding in Wireless Communications at WCNC 2017, the Symposium on Data Flow Algorithms and Architecture for Signal Processing Systems (GlobalSIP 2014), and the IEEE ICC 2012 Workshop on Emerging Data Storage Technologies. He served as an Associate Editor for IEEE Transactions on Signal Processing and a Senior Area Editor.

Talk Title: Optimization Approaches for Decoding.

SS4: Coding for Massive Multiple Access
Organizers: Yury Polyanskiy (Massachusetts Institute of Technology), Alexander Fengler (Massachusetts Institute of Technology)

Massive multiple access refers to a communication scenario where a large number of low-cost devices tries to exchange data wirelessly with a receiver. The design of efficient protocols for such systems is one of the major challenges for next-generation mobile networks. This session is dedicated to recent advances in code design for multiple access systems as well as identifying challenges arising from novel architectures.

Keynote: Tingfang Ji (VP of Wireless Research at Qualcomm)

Bio: Tingfang Ji joined Qualcomm in 2003 and is currently a VP of Engineering on Wireless Research. He leads a flagship research project on 5G NR design/standardization, pre-commercial IODT/trials, experimental macro networks, and long-term pre-6G research. Before joining Qualcomm, Tingfang was a member of the technical staff at Bell Labs. As an inventor, he has more than 600 granted US patents. Tingfang received his Ph.D. degree in E.E. from the University of Michigan, Ann Arbor in 2001, and also received a B.Sc. from Tsinghua University, Beijing.

Talk Title: Massive scaling in 6G designs.

SS5: Short Codes and their applications
Organizers: Emmanuel Boutillon (Université de Bretagne Sud) , Iryna Andriyanova (CY Cergy Paris Université)

Codes from short to medium code lengths have been intensively required in a multi-tude of communication systems and under a number of transmission scenarios. Internet of things (IoT) applications, 5G, privacy and data storage applications are only some of them. It is important to note that both design and decoding of codes of moderate block lengths is nontrivial, given the facts that (a) most of well known asymptotic design approaches fail in this operating regime, and (b) low complexity iterative decoding methods do not give a sufficiently low error probability after decoding.

Keynote: Henry Pfister

Bio: Henry D. Pfister received his Ph.D. in Electrical Engineering in 2003 from the University of California, San Diego and is currently a professor in the Electrical and Computer Engineering Department of Duke University with a secondary appointment in Mathematics.  Prior to that, he was an associate professor at Texas A&M University (2006-2014), a post-doctoral fellow at the École Polytechnique Fédérale de Lausanne (2005-2006), and a senior engineer at Qualcomm Corporate R&D in San Diego (2003-2004).  His current research interests include information theory, error-correcting codes, quantum computing, and machine learning.

He received the NSF Career Award in 2008 and a Texas A&M ECE Department Outstanding Professor Award in 2010.  He is a coauthor of the 2007 IEEE COMSOC best paper in Signal Processing and Coding for Data Storage, a coauthor of a 2016 Symposium on the Theory of Computing (STOC) best paper, and a recipient of the 2021 Information Theory Society Paper Award.  He has served the IEEE Information Theory Society as a member of the Board of Governors (2019-2023), an Associate Editor for the IEEE Transactions on Information Theory (2013-2016), and a Distinguished Lecturer (2015-2016).  He was the General Chair of the 2016 North American School of Information Theory and a Technical Program Committee Co-Chair of the 2021 International Symposium on Information Theory.

Talk Title: Short Block Codes: A Safari Experience in the Error Correction Zoo.

While the error-correction zoo contains a plethora of interesting examples, the diversity of long codes found in the wild is rather limited.  In particular, low-density parity-check (LDPC) codes are the clear winner in this regime because they provide an excellent trade-off between performance and complexity.  For short blocks, belief propagation decoding of LDPC codes is less effective and there are many codes and decoders with competitive performance.  In this talk, we’ll explore the landscape of short block coding by comparing and contrasting various codes and decoders. Along the way, we’ll highlight some challenges and opportunities for researchers working with these codes and decoders.  To wrap up the safari, we’ll provide some suggestions for future expeditions in the short block coding ecosystem.

SS6: (De-)Coding for HW-implementation
Organizers: Charbel Abdel Nour(IMT Atlantique), Stefan Weithoffer(IMT Atlantique)

The stringent requirements of emerging communication scenarios, like 5G Ultra-Reliable Low-Latency Communication (URLLC), severely challenge decoding hardware architectures for all major code families. Indeed, one of the outcomes of the recently finished EU project EPIC targeting ultra-high throughput coding, clearly states that there is no silver bullet in terms of code family. Indeed today, there is no code family that is able to achieve jointly ultra-high throughput, low latency, reasonable chip area and power consumption, excellent error correction capabilities while providing the level of support for frame size and code rate flexibilities required for practical applications. Only when code design, disruptive decoding algorithms and cutting-edge hardware architectures are jointly considered the necessary leap in power and area efficiencies expected for next generation networks can be made.

Keynote: Andreas Peter Burg

Bio: He received his Dipl.-Ing. degree in 2000 from the Swiss Federal Institute of Technology (ETH) Zurich, Zurich, Switzerland. He then joined the Integrated Systems Laboratory of ETH Zurich, from where he graduated with the Dr. sc. techn. degree in 2006. In 1998, he worked at Siemens Semiconductors, San Jose, CA. During his doctoral studies, he was an intern with Bell Labs Wireless Research for a total of one year. From 2006 to 2007, he held positions as postdoctoral researcher at the Integrated Systems Laboratory and at the Communication Theory Group of the ETH Zurich. In 2007 he co-founded Celestrius, an ETH-spinoff in the field of MIMO wireless communication, where he was responsible for the ASIC development as Director for VLSI.

In January 2009, he joined ETH Zurich as SNF Assistant Professor and as head of the Signal Processing Circuits and Systems group at the Integrated Systems Laboratory. In January 2011, he became a Tenure Track Assistant Professor at the Ecole Polytechnique Federale de Lausanne (EPFL) where he is leading the Telecommunications Circuits Laboratory in the School of Engineering. In June 2018 he was promoted to the role of a Tenured Associate Professor.

In 2000, Mr. Burg received the ‘’Willi Studer Award’’ and the ETH Medal for his diploma and his diploma thesis, respectively. Mr. Burg was also awarded an ETH Medal for his Ph.D. dissertation in 2006. In 2008, he received a 4-years grant from the Swiss National Science Foundation (SNF) for an SNF Assistant Professorship. In his professional career, Mr. Burg was involved in the development of more than 25 ASICs. He is a member of the IEEE and of the European Association for Signal Processing (EURASIP).

Talk Title: Optimizing Channel Decoders for 5G Requirements.

Authors: Yuqing Ren, Yifei Shen, Andreas Burg

5G wireless systems incorporate two new channel codes compared to 4G-LTE: LDPC codes and Polar codes. Despite the moderate throughput of 5G (compared to optical wireline and 6G systems), the corresponding channel decoders are an important part of the complexity of the wireless modem. The challenge in this case lies in optimizing the efficiency of the decoder while meeting the specifications and requirements of the standard including block-size, code rates, different codes, and error rate performance. The associated tradeoffs and design decisions are often different from those that are preferred when striving primarily for very high (or even maximum) throughput. In this talk, we will discuss this design objective and highlight associated algorithm and architectural options based on the example of 5G for LDPC and Polar codes and we will show two corresponding decoder implementations that are currently amongst the most efficient designs meeting the standard requirements. Based on these example the presentation highlights design strategies and considerations that can also be useful to guide the implementation for other requirements, albeit with different design decisions.

SS7: Coding for quantum channels
Organizers: Bane Vasić (University of Arizona), Narayanan Rengaswamy (University of Arizona)

Quantum error correction is critical for scaling up quantum systems in a fault-tolerant manner. In all such systems, e.g., computing, sensing, networking, it is important to understand the mechanism of underlying errors and design appropriate codes and decoders. This requires both a fundamental understanding of how decoders work for these codes and what factors cause it to fail, as well as the practicalities of implementing these mechanisms in hardware while meeting physical constraints such as timing, hardware reconfigurability, and computational accuracy. In this regard, low-density parity-check (LDPC) codes form an attractive solution, although several aspects of their quantum versions still remain to be understood. In this session, we will hear from experts about recent progress in the design of good codes, iterative decoders, and their application in practical quantum systems.